foxBMS  1.6.0
The foxBMS Battery Management System API Documentation
spi_cfg.c
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41 
42 /**
43  * @file spi_cfg.c
44  * @author foxBMS Team
45  * @date 2020-03-05 (date of creation)
46  * @updated 2023-10-12 (date of last update)
47  * @version v1.6.0
48  * @ingroup DRIVERS_CONFIGURATION
49  * @prefix SPI
50  *
51  * @brief Configuration for the SPI module
52  *
53  */
54 
55 /*========== Includes =======================================================*/
56 #include "spi_cfg.h"
57 
58 #include "spi_cfg-helper.h"
59 
60 #include <stdint.h>
61 
62 /*========== Macros and Definitions =========================================*/
63 
64 /*========== Static Constant and Variable Definitions =======================*/
65 
66 /** @defgroup spi_data_format SPI data configuration structs
67  *
68  * These data configuration structs are used below in the
69  * #SPI_INTERFACE_CONFIG_s structures. Each data configuration structs refers
70  * to a format selection (e.g. SPI_FMT_0). These are defined in the HAL for
71  * each SPI channel (1-5). In order to limit potential confusion the data
72  * formats on SPI1 and SPI4 (the SPI interfaces that are routed to the
73  * interface board that contains the AFE) have to be configured the same.
74  * This way, the developer can switch between SPI1 and SPI4 without having to
75  * change the SPI data format.
76  *
77  * AFE | SPI data format
78  * ------- | ---------------
79  * LTC | SPI_FMT_0
80  * MXM | SPI_FMT_1
81  * NXP | SPI_FMT_2
82  * unused | SPI_FMT_3
83  *
84  * For hardware Chip Select, setting one bit to 0 in the CSNR field of the
85  * SPIDAT1 register activates the corresponding Chip Select pin.
86  */
87 
88 /** SPI data configuration struct for ADI communication */
89 static spiDAT1_t spi_kAdiDataConfig[BS_NR_OF_STRINGS] = {
90  { /* struct is implemented in the TI HAL and uses uppercase true and false */
91  .CS_HOLD = TRUE, /* If true, HW chip select kept active between words */
92  .WDEL = FALSE, /* Activation of delay between words */
93  .DFSEL = SPI_FMT_0, /* Data word format selection */
94  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
96 };
97 
98 /** SPI data configuration struct for LTC communication */
99 static spiDAT1_t spi_kLtcDataConfig[BS_NR_OF_STRINGS] = {
100  { /* struct is implemented in the TI HAL and uses uppercase true and false */
101  .CS_HOLD = TRUE, /* If true, HW chip select kept active between words */
102  .WDEL = FALSE, /* Activation of delay between words */
103  .DFSEL = SPI_FMT_0, /* Data word format selection */
104  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
106 };
107 
108 /** SPI data configuration struct for MXM communication */
109 static spiDAT1_t spi_kMxmDataConfig = {
110  .CS_HOLD = TRUE, /* If true, HW chip select kept active */
111  .WDEL = TRUE, /* Activation of delay between words */
112  .DFSEL = SPI_FMT_1, /* Data word format selection */
113  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
115 };
116 
117 /** SPI data configuration struct for NXP MC33775A communication, Tx part */
119  {.CS_HOLD = TRUE, /* If true, HW chip select kept active */
120  .WDEL = TRUE, /* Activation of delay between words */
121  .DFSEL = SPI_FMT_2, /* Data word format selection */
122  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
124 };
125 
126 /** SPI data configuration struct for NXP MC33775A communication, Rx part */
128  {.CS_HOLD = TRUE, /* If true, HW chip select kept active */
129  .WDEL = TRUE, /* Activation of delay between words */
130  .DFSEL = SPI_FMT_2, /* Data word format selection */
131  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
133 };
134 
135 /** SPI data configuration struct for FRAM communication */
136 static spiDAT1_t spi_kFramDataConfig = {
137  /* struct is implemented in the TI HAL and uses uppercase true and false */
138  .CS_HOLD = TRUE, /* If true, HW chip select kept active */
139  .WDEL = TRUE, /* Activation of delay between words */
140  .DFSEL = SPI_FMT_1, /* Data word format selection */
141  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
143 };
144 
145 /** SPI data configuration struct for SPS communication in low speed (4MHz) */
146 static spiDAT1_t spi_kSpsDataConfigLowSpeed = {
147  /* struct is implemented in the TI HAL and uses uppercase true and false */
148  .CS_HOLD = TRUE, /* If true, HW chip select kept active */
149  .WDEL = TRUE, /* Activation of delay between words */
150  .DFSEL = SPI_FMT_1, /* Data word format selection */
151  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
153 };
154 
155 /** SPI data configuration struct for SPS communication in high speed (10MHz) */
156 static spiDAT1_t spi_kSpsDataConfigHighSpeed = {
157  /* struct is implemented in the TI HAL and uses uppercase true and false */
158  .CS_HOLD = TRUE, /* If true, HW chip select kept active */
159  .WDEL = TRUE, /* Activation of delay between words */
160  .DFSEL = SPI_FMT_2, /* Data word format selection */
161  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
163 };
164 
165 /** SPI configuration struct for SBC communication */
166 static spiDAT1_t spi_kSbcDataConfig = {
167  /* struct is implemented in the TI HAL and uses uppercase true and false */
168  .CS_HOLD = TRUE, /* If true, HW chip select kept active */
169  .WDEL = TRUE, /* Activation of delay between words */
170  .DFSEL = SPI_FMT_0, /* Data word format selection */
171  /* Hardware chip select is configured automatically depending on configuration in #SPI_INTERFACE_CONFIG_s */
173 };
174 
175 /*========== Extern Constant and Variable Definitions =======================*/
176 
177 /**
178  * SPI interface configuration for ADI communication
179  * This is a list of structs because of multistring
180  */
182  {
183  .pConfig = &spi_kAdiDataConfig[0u],
184  .pNode = spiREG1,
185  .pGioPort = &(spiREG1->PC3),
186  .csPin = SPI_ADI_CHIP_SELECT_PIN,
187  .csType = SPI_CHIP_SELECT_HARDWARE,
188  },
189 };
190 
191 /**
192  * SPI interface configuration for LTC communication
193  * This is a list of structs because of multistring
194  */
196  {
197  .pConfig = &spi_kLtcDataConfig[0u],
198  .pNode = spiREG1,
199  .pGioPort = &(spiREG1->PC3),
200  .csPin = SPI_LTC_CHIP_SELECT_PIN,
201  .csType = SPI_CHIP_SELECT_HARDWARE,
202  },
203 };
204 
205 /** SPI interface configuration for MXM communication */
208  .pNode = spiREG4,
209  .pGioPort = &(spiREG4->PC3),
210  .csPin = SPI_MAXIM_CHIP_SELECT_PIN,
211  .csType = SPI_CHIP_SELECT_HARDWARE,
212 };
213 
214 /** SPI interface configuration for N775 communication Tx part */
216  {
218  .pNode = spiREG1,
219  .pGioPort = &(spiREG1->PC3),
221  .csType = SPI_CHIP_SELECT_HARDWARE,
222  },
223 };
224 
225 /** SPI interface configuration for N775 communication, Rx part */
227  {
229  .pNode = spiREG4,
230  .pGioPort = &(spiREG4->PC3),
232  .csType = SPI_CHIP_SELECT_HARDWARE,
233  },
234 };
235 
236 /** SPI interface configuration for FRAM communication */
239  .pNode = spiREG3,
240  .pGioPort = &(spiREG3->PC3),
241  .csPin = SPI_FRAM_CHIP_SELECT_PIN,
242  .csType = SPI_CHIP_SELECT_SOFTWARE,
243 };
244 
245 /** SPI interface configuration for SPS communication */
248  .pNode = spiREG2,
249  .pGioPort = &SPI_SPS_CS_GIOPORT,
250  .csPin = SPI_SPS_CS_PIN,
251  .csType = SPI_CHIP_SELECT_SOFTWARE,
252 };
253 
254 /** SPI interface configuration for SBC communication */
257  .pNode = spiREG2,
258  .pGioPort = &(spiREG2->PC3),
260  .csType = SPI_CHIP_SELECT_HARDWARE,
261 };
262 
263 /** struct containing the lock state of the SPI interfaces */
265  SPI_IDLE,
266  SPI_IDLE,
267  SPI_IDLE,
268  SPI_IDLE,
269  SPI_IDLE,
270 };
271 
272 /** size of #spi_busyFlags */
273 const uint8_t spi_nrBusyFlags = sizeof(spi_busyFlags) / sizeof(SPI_BUSY_STATE_e);
274 
275 /*========== Static Function Prototypes =====================================*/
276 
277 /*========== Static Function Implementations ================================*/
278 
279 /*========== Extern Function Implementations ================================*/
281  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
282  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigHighSpeed;
283 }
284 
286  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
287  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigLowSpeed;
288 }
289 
290 /*========== Externalized Static Function Implementations (Unit Test) =======*/
291 #ifdef UNITY_UNIT_TEST
292 #endif
#define BS_NR_OF_STRINGS
Number of parallel strings in the battery pack.
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:255
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:77
Headers for the configuration for the SPI module.
#define SPI_HARDWARE_CHIP_SELECT_DISABLE_ALL
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
Definition: spi_cfg.c:285
static spiDAT1_t spi_kNxp775DataConfigRx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:127
static spiDAT1_t spi_kAdiDataConfig[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:89
SPI_INTERFACE_CONFIG_s spi_mxmInterface
Definition: spi_cfg.c:206
static spiDAT1_t spi_kSbcDataConfig
Definition: spi_cfg.c:166
SPI_INTERFACE_CONFIG_s spi_adiInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:181
SPI_INTERFACE_CONFIG_s spi_sbcMcuInterface
Definition: spi_cfg.c:255
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceTx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:215
static spiDAT1_t spi_kNxp775DataConfigTx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:118
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:264
SPI_INTERFACE_CONFIG_s spi_framInterface
Definition: spi_cfg.c:237
static spiDAT1_t spi_kFramDataConfig
Definition: spi_cfg.c:136
static spiDAT1_t spi_kLtcDataConfig[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:99
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
Definition: spi_cfg.c:280
static spiDAT1_t spi_kMxmDataConfig
Definition: spi_cfg.c:109
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceRx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:226
static spiDAT1_t spi_kSpsDataConfigHighSpeed
Definition: spi_cfg.c:156
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:195
const uint8_t spi_nrBusyFlags
Definition: spi_cfg.c:273
SPI_INTERFACE_CONFIG_s spi_spsInterface
Definition: spi_cfg.c:246
static spiDAT1_t spi_kSpsDataConfigLowSpeed
Definition: spi_cfg.c:146
Headers for the configuration for the SPI module.
SPI_BUSY_STATE_e
Definition: spi_cfg.h:109
@ SPI_IDLE
Definition: spi_cfg.h:110
#define SPI_NXP_TX_CHIP_SELECT_PIN
Definition: spi_cfg.h:145
#define SPI_ADI_CHIP_SELECT_PIN
Definition: spi_cfg.h:136
#define SPI_NXP_RX_CHIP_SELECT_PIN
Definition: spi_cfg.h:146
#define SPI_MAXIM_CHIP_SELECT_PIN
Definition: spi_cfg.h:142
#define SPI_LTC_CHIP_SELECT_PIN
Definition: spi_cfg.h:139
#define SPI_SPS_CS_GIOPORT
Definition: spi_cfg.h:153
#define SPI_SBC_MCU_CHIP_SELECT_PIN
Definition: spi_cfg.h:106
@ SPI_CHIP_SELECT_SOFTWARE
Definition: spi_cfg.h:118
@ SPI_CHIP_SELECT_HARDWARE
Definition: spi_cfg.h:117
#define SPI_SPS_CS_PIN
Definition: spi_cfg.h:155
#define SPI_FRAM_CHIP_SELECT_PIN
Definition: spi_cfg.h:150
spiDAT1_t * pConfig
Definition: spi_cfg.h:126