foxBMS  1.6.0
The foxBMS Battery Management System API Documentation
spi_cfg.h
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41 
42 /**
43  * @file spi_cfg.h
44  * @author foxBMS Team
45  * @date 2020-03-05 (date of creation)
46  * @updated 2023-10-12 (date of last update)
47  * @version v1.6.0
48  * @ingroup DRIVERS_CONFIGURATION
49  * @prefix SPI
50  *
51  * @brief Headers for the configuration for the SPI module
52  *
53  *
54  */
55 
56 #ifndef FOXBMS__SPI_CFG_H_
57 #define FOXBMS__SPI_CFG_H_
58 
59 /*========== Includes =======================================================*/
60 
61 #include "battery_system_cfg.h"
62 
63 #include "HL_het.h"
64 #include "HL_spi.h"
65 
66 #include <stdint.h>
67 
68 /*========== Macros and Definitions =========================================*/
69 
70 /** Index for the SPI nodes @{ */
71 #define SPI_SPI1_INDEX (0u)
72 #define SPI_SPI2_INDEX (1u)
73 #define SPI_SPI3_INDEX (2u)
74 #define SPI_SPI4_INDEX (3u)
75 #define SPI_SPI5_INDEX (4u)
76 /**@}*/
77 
78 /* Number of SPI interfaces */
79 #define SPI_NR_SPI_INTERFACES (5u)
80 
81 /** Bit in SPIDAT1 register that activates hardware Chip Select hold */
82 #define SPI_CSHOLD_BIT (0x10000000u)
83 
84 /** Bit in SPIDAT1 register that activates delay between words */
85 #define SPI_WDEL_BIT (0x04000000u)
86 
87 /** Position of CSNR field in SPIDAT1 register */
88 #define SPI_HARDWARE_CHIP_SELECT_FIELD_POSITION (16u)
89 
90 /** Position of DFSEL field in SPIDAT1 register */
91 #define SPI_DATA_FORMAT_FIELD_POSITION (24u)
92 
93 /** Position of TX buffer empty flag in SPIFLG register */
94 #define SPI_TX_BUFFER_EMPTY_FLAG_POSITION (9u)
95 
96 /** Mask used to clear all HW CS bits */
97 #define SPI_PC0_CLEAR_HW_CS_MASK (0xFFFFFF00u)
98 
99 /** Time to avoid infinite loop when waiting for Tx empty flag in a while loop */
100 #define SPI_TX_EMPTY_TIMEOUT_ITERATIONS (6000u)
101 
102 /** Max number of hardware chip select pins */
103 #define SPI_MAX_NUMBER_HW_CS (6u)
104 
105 /** SBC MCU chip select pin */
106 #define SPI_SBC_MCU_CHIP_SELECT_PIN (0u)
107 
108 /** enum for spi interface state */
109 typedef enum {
113 
114 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-cs-type-start-include */
115 /** type of chip select for spi */
116 typedef enum {
121 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-cs-type-stop-include */
122 
123 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-configuration-start-include */
124 /** configuration of the SPI interface */
125 typedef struct {
126  spiDAT1_t *pConfig;
127  spiBASE_t *pNode;
128  volatile uint32_t *pGioPort;
129  uint32_t csPin;
132 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-configuration-stop-include */
133 
134 /* -------------- SPI Configurations --------------------------------------- */
135 /** ADI chip select pin */
136 #define SPI_ADI_CHIP_SELECT_PIN (1u)
137 
138 /** LTC chip select pin */
139 #define SPI_LTC_CHIP_SELECT_PIN (1u)
140 
141 /** Maxim chip select pin */
142 #define SPI_MAXIM_CHIP_SELECT_PIN (0u)
143 
144 /** NXP chip select pin @{ */
145 #define SPI_NXP_TX_CHIP_SELECT_PIN (1u)
146 #define SPI_NXP_RX_CHIP_SELECT_PIN (0u)
147 /**@}*/
148 
149 /** FRAM chip select pin */
150 #define SPI_FRAM_CHIP_SELECT_PIN (1u)
151 
152 /** GIO defines for SPI for Smart Power Switches @{ */
153 #define SPI_SPS_CS_GIOPORT (hetREG2->DOUT)
154 #define SPI_SPS_CS_GIOPORT_DIR (hetREG2->DIR)
155 #define SPI_SPS_CS_PIN (1u) /* Connected to pin 1 of HET register */
156 /**@}*/
157 
158 /*========== Extern Constant and Variable Declarations ======================*/
167 
169 
170 extern const uint8_t spi_nrBusyFlags;
171 
172 /*========== Extern Function Prototypes =====================================*/
173 /**
174  * @brief Switch the SPS spi handle to high speed
175  * @param[out] pSpiSpsInterface handle of the SPS spi config
176  */
177 extern void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface);
178 
179 /**
180  * @brief Switch the SPS spi handle to low speed
181  * @param[out] pSpiSpsInterface handle of the SPS spi config
182  */
183 extern void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface);
184 
185 /*========== Externalized Static Functions Prototypes (Unit Test) ===========*/
186 #ifdef UNITY_UNIT_TEST
187 #endif
188 
189 #endif /* FOXBMS__SPI_CFG_H_ */
Configuration of the battery system (e.g., number of battery modules, battery cells,...
#define BS_NR_OF_STRINGS
Number of parallel strings in the battery pack.
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
Definition: spi_cfg.c:285
SPI_BUSY_STATE_e
Definition: spi_cfg.h:109
@ SPI_IDLE
Definition: spi_cfg.h:110
@ SPI_BUSY
Definition: spi_cfg.h:111
SPI_INTERFACE_CONFIG_s spi_mxmInterface
Definition: spi_cfg.c:206
SPI_INTERFACE_CONFIG_s spi_adiInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:181
SPI_INTERFACE_CONFIG_s spi_sbcMcuInterface
Definition: spi_cfg.c:255
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceTx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:215
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:264
SPI_INTERFACE_CONFIG_s spi_framInterface
Definition: spi_cfg.c:237
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
Definition: spi_cfg.c:280
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceRx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:226
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:195
const uint8_t spi_nrBusyFlags
Definition: spi_cfg.c:273
SPI_CHIP_SELECT_TYPE_e
Definition: spi_cfg.h:116
@ SPI_CHIP_SELECT_SOFTWARE
Definition: spi_cfg.h:118
@ SPI_CHIP_SELECT_MAX
Definition: spi_cfg.h:119
@ SPI_CHIP_SELECT_HARDWARE
Definition: spi_cfg.h:117
SPI_INTERFACE_CONFIG_s spi_spsInterface
Definition: spi_cfg.c:246
SPI_CHIP_SELECT_TYPE_e csType
Definition: spi_cfg.h:130
volatile uint32_t * pGioPort
Definition: spi_cfg.h:128
spiDAT1_t * pConfig
Definition: spi_cfg.h:126
spiBASE_t * pNode
Definition: spi_cfg.h:127