spi_cfg-helper.h File Reference

Headers for the configuration for the SPI module. More...

#include <stdint.h>

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Macros
#define	SPI_HARDWARE_CHIP_SELECT_ACTIVE   (0u)
#define	SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE   (1u)
#define	SPI_HARDWARE_CHIP_SELECT_DISABLE_ALL
#define	SPI_HARDWARE_CHIP_SELECT_0_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_1_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_2_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_3_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_4_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_5_ACTIVE
#define	SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION   (0u)
#define	SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION   (1u)
#define	SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION   (2u)
#define	SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION   (3u)
#define	SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION   (4u)
#define	SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION   (5u)

Detailed Description

Headers for the configuration for the SPI module.

Copyright

© 2010 - 2023, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V. All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Author

foxBMS Team

Date

2021-12-08 (date of creation)

Updated

2023-10-12 (date of last update)

Version

v1.6.0

Prefix

SPI

Definition in file spi_cfg-helper.h.

Macro Definition Documentation

SPI_HARDWARE_CHIP_SELECT_0_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_0_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 95 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION   (0u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 65 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_1_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_1_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 109 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION   (1u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 66 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_2_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_2_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 123 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION   (2u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 67 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_3_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_3_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 137 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION   (3u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 68 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_4_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_4_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 151 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION   (4u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 69 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_5_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_5_ACTIVE

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_ACTIVE     << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
    ))

Definition at line 165 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION

#define SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION   (5u)

HW chip select bit position, TMS570LC4357 has maximum of six hardware chip select pins per SPI node

Definition at line 70 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_ACTIVE   (0u)

Bit mask to activate hardware chip select in the CSNR field of the SPIDAT1 register

Definition at line 74 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_DISABLE_ALL

#define SPI_HARDWARE_CHIP_SELECT_DISABLE_ALL

Value:

    ((uint8_t)(                                                                                \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
        (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION)   /* CS5 */ \
        ))

Definition at line 81 of file spi_cfg-helper.h.

SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE

#define SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE   (1u)

Bit mask to not activate hardware chip select in the CSNR field of the SPIDAT1 register

Definition at line 77 of file spi_cfg-helper.h.