61 #include "HL_system.h"
90 .configValues.communicationMode =
fs8xSPI,
91 .configValues.i2cAddressOtp = 0,
94 .fin.pGIOport = &(systemREG1->SYSPC4),
125 uint32_t registerAddress,
126 uint32_t registerValue);
138 uint32_t registerAddress,
139 uint32_t registerValue);
153 uint32_t registerAddress,
154 uint32_t registerValue);
179 uint8_t registerAddress,
180 uint16_t registerValue);
194 uint8_t registerAddress,
195 uint16_t registerValue);
210 uint8_t registerAddress,
212 uint16_t registerValue);
256 if (registerValue != expectedRegisterValue) {
264 uint32_t registerAddress,
265 uint32_t registerValue) {
269 switch (registerAddress) {
289 pFsRegister->
i_svs = registerValue;
307 pFsRegister->
safeIos = registerValue;
316 pFsRegister->
states = registerValue;
326 uint32_t registerAddress,
327 uint32_t registerValue) {
331 switch (registerAddress) {
333 pMainRegister->
flag = registerValue;
336 pMainRegister->
mode = registerValue;
348 pMainRegister->
clock = registerValue;
351 pMainRegister->
int_mask1 = registerValue;
354 pMainRegister->
int_mask2 = registerValue;
357 pMainRegister->
flag1 = registerValue;
360 pMainRegister->
flag2 = registerValue;
363 pMainRegister->
vmon_regx = registerValue;
366 pMainRegister->
lvb1_svs = registerValue;
369 pMainRegister->
memory0 = registerValue;
372 pMainRegister->
memory1 = registerValue;
375 pMainRegister->
deviceId = registerValue;
386 uint32_t registerAddress,
387 uint32_t registerValue) {
389 FAS_ASSERT((isFailSafe ==
true) || (isFailSafe ==
false));
394 if (isFailSafe ==
true) {
403 FAS_ASSERT((isFailSafe ==
true) || (isFailSafe ==
false));
423 uint8_t registerAddress,
424 uint16_t registerValue) {
445 uint8_t registerAddress,
446 uint16_t registerValue) {
466 if (rxTemp.
readData == registerValue) {
479 uint8_t registerAddress,
481 uint16_t registerValue) {
505 if ((rxTemp.
readData & registerValue) == 0u) {
535 uint16_t registerMask = 0u;
536 uint16_t expRegisterValue = 0u;
537 uint16_t registerValue = 0u;
920 bool ignitionSignalDetected =
true;
922 static uint16_t wake1Level = 0u;
923 static uint16_t oldWake1Level = 0u;
933 if ((oldWake1Level != wake1Level) && (wake1Level == 0u)) {
936 wake1Level = oldWake1Level;
938 ignitionSignalDetected =
false;
942 oldWake1Level = wake1Level;
943 return ignitionSignalDetected;
948 uint8_t *pRequiredWatchdogRefreshes) {
967 uint8_t watchdogRefreshLimit = 0u;
975 watchdogRefreshLimit = 6u;
980 watchdogRefreshLimit = 4u;
985 watchdogRefreshLimit = 2u;
987 watchdogRefreshLimit = 1u;
991 uint8_t faultCounter = 0u;
998 *pRequiredWatchdogRefreshes = faultCounter + (watchdogRefreshLimit - watchdogRefreshCounter);
1010 uint8_t faultCounter = 0u;
1012 if (faultCounter != 0u) {
1055 uint16_t frameLengthBytes,
1069 fs85_rxBuffer[i] = 0;
1075 if (spiRetval ==
STD_OK) {
1083 return spiCommunicationState;
1168 bool test_assertionRSTB =
false;
1172 if (rstReason == POWERON_RESET) {
1204 test_assertionRSTB =
false;
1207 test_assertionRSTB =
false;
1209 }
else if (rstReason == EXT_RESET) {
1219 test_assertionRSTB =
false;
1222 test_assertionRSTB =
false;
1234 uint16_t expRegisterValue =
1253 test_assertionRSTB =
false;
1267 test_assertionRSTB =
false;
1277 if (test_assertionRSTB ==
true) {
1305 #ifdef UNITY_UNIT_TEST
1312 uint32_t registerAddress,
1313 uint32_t registerValue) {
1318 uint32_t registerAddress,
1319 uint32_t registerValue) {
1325 uint32_t registerAddress,
1326 uint32_t registerValue) {
1334 uint8_t registerAddress,
1335 uint16_t registerValue) {
1340 uint8_t registerAddress,
1341 uint16_t registerValue) {
1346 uint8_t registerAddress,
1348 uint16_t registerValue) {
DIAG_RETURNTYPE_e DIAG_Handler(DIAG_ID_e diagId, DIAG_EVENT_e event, DIAG_IMPACT_LEVEL_e impact, uint32_t data)
DIAG_Handler provides generic error handling, based on diagnosis group.
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
#define FAS_TRAP
Define that evaluates to essential boolean false thus tripping an assert.
FRAM_RETURN_TYPE_e FRAM_ReadData(FRAM_BLOCK_ID_e blockId)
Reads a variable from the FRAM.
FRAM_RETURN_TYPE_e FRAM_WriteData(FRAM_BLOCK_ID_e blockId)
Writes a variable to the FRAM.
Header for the driver for the FRAM module.
FRAM_SBC_INIT_s fram_sbcInit
@ FRAM_BLOCK_ID_SBC_INIT_STATE
Definition of foxBMS standard types.
#define NULL_PTR
Null pointer.
Function to switch between user mode and privilege mode.
#define FSYS_SwitchToUserMode()
Switch back to user mode.
long FSYS_RaisePrivilege(void)
Raise privilege.
#define UNIT_TEST_WEAK_IMPL
fs8x_status_t FS8x_GetFaultErrorCounterValue(SPI_INTERFACE_CONFIG_s *spiInterface, fs8x_drv_data_t *drvData, uint8_t *faultErrorCounterValue)
Reads actual Fault Error Counter value.
fs8x_status_t FS8x_WD_Refresh(SPI_INTERFACE_CONFIG_s *spiInterface, fs8x_drv_data_t *drvData)
Performs the watchdog refresh.
fs8x_status_t FS8x_WriteRegisterInit(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, uint8_t address, uint16_t writeData)
Performs a write to a single FS8x FS init register (during the INIT_FS phase only).
fs8x_status_t FS8x_WriteRegister(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, bool isFailSafe, uint8_t address, uint16_t writeData)
Sends write command to the FS8x.
fs8x_status_t FS8x_FS0B_Release(SPI_INTERFACE_CONFIG_s *spiInterface, fs8x_drv_data_t *drvData)
FS0B release routine.
fs8x_status_t FS8x_ReadRegister(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, bool isFailSafe, uint8_t address, fs8x_rx_frame_t *rxData)
Performs a read from a single FS8x register.
fs8x_status_t
Status return codes.
UNIT_TEST_WEAK_IMPL fs8x_status_t MCU_SPI_TransferData(SPI_INTERFACE_CONFIG_s *pSpiInterface, uint8_t *txFrame, uint16_t frameLengthBytes, uint8_t *rxFrame)
This function transfers single frame through blocking SPI communication in both directions....
void IO_PinSet(volatile uint32_t *pRegisterAddress, uint32_t pin)
Set pin by writing in pin output register.
void IO_PinReset(volatile uint32_t *pRegisterAddress, uint32_t pin)
Reset pin by writing in pin output register.
Header for the driver for the IO module.
resetSource_t MINFO_GetResetSource(void)
Get reason for last reset.
void MINFO_SetDebugProbeConnectionState(MINFO_DEBUG_PROBE_CONNECTION_STATE_e state)
Check if debug probe is connected.
General foxBMS-master system information.
@ MINFO_DEBUG_PROBE_CONNECTED
@ MINFO_DEBUG_PROBE_NOT_CONNECTED
void MCU_Delay_us(uint32_t delay_us)
Wait blocking a certain time in microseconds.
Headers for the driver for the MCU module.
STD_RETURN_TYPE_e TEST_FS85_ReadBackRegister(FS85_STATE_s *pInstance, bool isFailSafe, uint8_t registerAddress)
STD_RETURN_TYPE_e FS85_TriggerWatchdog(FS85_STATE_s *pInstance)
Trigger watchdog.
STD_RETURN_TYPE_e TEST_FS85_PerformPathCheckRstb(FS85_STATE_s *pInstance)
static STD_RETURN_TYPE_e FS85_ReadBackRegister(FS85_STATE_s *pInstance, bool isFailSafe, uint8_t registerAddress)
Reads SBC register value.
void TEST_FS85_UpdateRegister(FS85_STATE_s *pInstance, bool isFailSafe, uint32_t registerAddress, uint32_t registerValue)
STD_RETURN_TYPE_e FS85_InitializeNumberOfRequiredWatchdogRefreshes(FS85_STATE_s *pInstance, uint8_t *pRequiredWatchdogRefreshes)
Calculates the number of required watchdog refresh to reset fault error counter.
FS85_STATE_s fs85xx_mcuSupervisor
static STD_RETURN_TYPE_e FS85_PerformPathCheckRstb(FS85_STATE_s *pInstance)
Perform RSTB safety path check.
STD_RETURN_TYPE_e FS85_InitializeFsPhase(FS85_STATE_s *pInstance)
Configures SBC during INIT_FS phase.
@ FS85_RSTB_ASSERTION_TEST
static STD_RETURN_TYPE_e FS85_PerformPathCheckFs0b(FS85_STATE_s *pInstance)
Perform FS0B safety path check.
STD_RETURN_TYPE_e TEST_FS85_GoToStandby(FS85_STATE_s *pInstance)
static void FS85_UpdateRegister(FS85_STATE_s *pInstance, bool isFailSafe, uint32_t registerAddress, uint32_t registerValue)
Updates register values.
STD_RETURN_TYPE_e TEST_FS85_PerformPathCheckFs0b(FS85_STATE_s *pInstance)
static STD_RETURN_TYPE_e FS85_GoToStandby(FS85_STATE_s *pInstance)
Sends SBC to Standby Mode.
static void FS85_UpdateFailSafeRegister(FS85_FS_REGISTER_s *pFsRegister, uint32_t registerAddress, uint32_t registerValue)
Updates fail safe register values.
bool FS85_CheckIgnitionSignal(FS85_STATE_s *pInstance)
Check WAKE1 Signal at SBC.
void TEST_FS85_UpdateFailSafeRegister(FS85_FS_REGISTER_s *pFsRegister, uint32_t registerAddress, uint32_t registerValue)
static STD_RETURN_TYPE_e FS85_CheckRegisterValues(uint32_t registerValue, uint32_t expectedRegisterValue)
Checks register value against expected value.
STD_RETURN_TYPE_e TEST_FS85_CheckRegisterValues(uint32_t registerValue, uint32_t expectedRegisterValue)
STD_RETURN_TYPE_e TEST_FS85_WriteBackRegisterFsInit(FS85_STATE_s *pInstance, uint8_t registerAddress, uint16_t registerValue)
static void FS85_UpdateMainRegister(FS85_MAIN_REGISTERS_s *pMainRegister, uint32_t registerAddress, uint32_t registerValue)
Updates main register values.
static STD_RETURN_TYPE_e FS85_ReadBackAllRegisters(FS85_STATE_s *pInstance)
Clears flags in register.
static STD_RETURN_TYPE_e FS85_WriteRegisterFsInit(FS85_STATE_s *pInstance, uint8_t registerAddress, uint16_t registerValue)
Write to fail-safe register.
static STD_RETURN_TYPE_e FS85_ClearRegisterFlags(FS85_STATE_s *pInstance, uint8_t registerAddress, bool isFailSafe, uint16_t registerValue)
Clears flags in register.
void TEST_FS85_UpdateMainRegister(FS85_MAIN_REGISTERS_s *pMainRegister, uint32_t registerAddress, uint32_t registerValue)
STD_RETURN_TYPE_e TEST_FS85_ReadBackAllRegisters(FS85_STATE_s *pInstance)
STD_RETURN_TYPE_e TEST_FS85_ClearRegisterFlags(FS85_STATE_s *pInstance, uint8_t registerAddress, bool isFailSafe, uint16_t registerValue)
STD_RETURN_TYPE_e FS85_SafetyPathChecks(FS85_STATE_s *pInstance)
Performs SBC safety path checks.
STD_RETURN_TYPE_e TEST_FS85_WriteRegisterFsInit(FS85_STATE_s *pInstance, uint8_t registerAddress, uint16_t registerValue)
static STD_RETURN_TYPE_e FS85_WriteBackRegisterFsInit(FS85_STATE_s *pInstance, uint8_t registerAddress, uint16_t registerValue)
Write to fail-safe register.
STD_RETURN_TYPE_e FS85_CheckFaultErrorCounter(FS85_STATE_s *pInstance)
Checks if fault error counter is zero.
Header for the driver for the FRAM module.
#define FS8x_WD_SEED_DEFAULT
Watchdog seed default value.
#define FS8x_BO_GET_REG_VALUE(value, mask, shift)
Macro for getting value from register.
This file contains functions for SPI/I2C communication.
#define FS8x_COMM_FRAME_SIZE
#define FS8X_FS_I_FLT_ERR_IMPACT_FS0B_RSTB
#define FS8X_FS_VDDIO_UV_UNDERVOLTAGE_REPORTED
#define FS8X_FS_I_WD_RFR_CNT_MASK
#define FS8X_FS_BAD_WD_TIMING_MASK
#define FS8X_FS_VMON2_OV_OVERVOLTAGE_REPORTED
#define FS8X_M_VBOOSTUVH_EVENT_OCCURRED
#define FS8X_FS_I_ERRMON_FS_IMPACT_FS0B
#define FS8X_FS_VCOREMON_OV_OVERVOLTAGE_REPORTED
#define FS8X_FS_FCCU1_ERROR_DETECTED
#define FS8X_FS_RSTB_DIAG_MASK
#define FS8X_FS_I_FCCU_CFG_NO_MONITORING
#define FS8X_FS_RSTB_REQ_RSTB_ASSERTION
#define FS8X_M_WK2FLG_EVENT_OCCURRED
#define FS8X_FS_I_ERRMON_FLT_POLARITY_POSITIVE_EDGE
#define FS8X_M_INT_MASK2_ADDR
#define FS8X_FS_I_VMON2_UV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_I_ERRMON_ACK_TIME_32MS
#define FS8X_FS_WDW_DC_50
#define FS8X_FS_FSM_STATE_INIT_FS
#define FS8X_FS_I_FCCU1_FLT_POL_FCCU1_L
#define FS8X_FS_ABIST1_OK_PASS
#define FS8X_FS_I_VMON2_ABIST2_VMON2_BIST
#define FS8X_FS_I_VMON4_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_DBG_MODE_MASK
#define FS8X_M_MEMORY1_ADDR
#define FS8X_FS_ABIST2_OK_MASK
#define FS8X_FS_I_VMON3_ABIST2_VMON3_BIST
#define FS8X_FS_RSTB_EVENT_MASK
#define FS8X_FS_SPI_FS_CRC_ERROR_DETECTED
#define FS8X_FS_I_WD_RFR_LIMIT_2
#define FS8X_FS_SPI_FS_CLK_WRONG_NUMBER_OF_CLOCK_CYCLES
#define FS8X_FS_LBIST_OK_MASK
#define FS8X_FS_BAD_WD_DATA_BAD_WD_REFRESH
#define FS8X_FS_I2C_FS_CRC_ERROR_DETECTED
#define FS8X_FS_WD_ANSWER_ADDR
#define FS8X_FS_VMON3_UV_UNDERVOLTAGE_REPORTED
#define FS8X_FS_FSM_STATE_MASK
#define FS8X_M_REG_CTRL2_ADDR
#define FS8X_M_VBOSUVH_EVENT_OCCURRED
#define FS8X_FS_I_VDDIO_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_RSTB_DIAG_NO_FAILURE
#define FS8X_FS_RSTB_EVENT_RESET_OCCURRED
#define FS8X_FS_RELEASE_FS0B_ADDR
#define FS8X_FS_WD_WINDOW_ADDR
#define FS8X_FS_VCOREMON_UV_UNDERVOLTAGE_REPORTED
#define FS8X_FS_I_VDDIO_UV_FS_IMPACT_NO_EFFECT
#define FS8X_M_DEVICEID_ADDR
#define FS8X_M_FLAG1_ADDR
#define FS8X_FS_BAD_WD_TIMING_BAD_WD_REFRESH
#define FS8X_FS_I_VMON2_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_I2C_FS_REQ_I2C_VIOLATION
#define FS8X_M_VMON_REGX_ADDR
#define FS8X_FS_I_RSTB_DUR_10MS
#define FS8X_FS_I_WD_RFR_LIMIT_SHIFT
#define FS8X_FS_I_VDDIO_ABIST2_VDDIO_BIST
#define FS8X_M_VSUPUVL_EVENT_OCCURRED
#define FS8X_FS_I_VMON4_ABIST2_VMON4_BIST
#define FS8X_FS_ERRMON_ERROR_DETECTED
#define FS8X_M_REG_CTRL1_ADDR
#define FS8X_FS_I_VCOREMON_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_RSTB_SNS_PAD_SENSED_HIGH
#define FS8X_M_WK1RT_WAKE1_HIGH
#define FS8X_FS_VMON4_UV_UNDERVOLTAGE_REPORTED
#define FS8X_FS_I_VCOREMON_UV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_I_FLT_ERR_CNT_1
#define FS8X_FS_WD_SEED_ADDR
#define FS8X_FS_I_VMON3_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_I_WD_RFR_LIMIT_6
#define FS8X_FS_VMON4_OV_OVERVOLTAGE_REPORTED
#define FS8X_FS_RSTB_DRV_COMMAND_SENSED_HIGH
#define FS8X_FS_I_WD_RFR_LIMIT_MASK
#define FS8X_FS_DBG_MODE_NO_DEBUG
#define FS8X_FS_I_VMON3_UV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_OTP_CORRUPT_MASK
#define FS8X_FS_I_FS0B_SC_HIGH_CFG_NO_ASSERTION
#define FS8X_FS_I_VMON1_ABIST2_VMON1_BIST
#define FS8X_FS_WD_WINDOW_128MS
#define FS8X_FS_I_SAFE_INPUTS_ADDR
#define FS8X_M_GOTOSTBY_MASK
#define FS8X_FS_INTB_MASK_ADDR
#define FS8X_FS_SAFE_IOS_ADDR
#define FS8X_M_CLOCK_ADDR
#define FS8X_FS_I_OVUV_SAFE_REACTION1_ADDR
#define FS8X_M_VSUPUVH_EVENT_OCCURRED
#define FS8X_FS_OVUVREG_STATUS_ADDR
#define FS8X_FS_I_FSSM_ADDR
#define FS8X_FS_FS_OSC_DRIFT_OSCILLATOR_DRIFT
#define FS8X_FS_I_WD_CFG_ADDR
#define FS8X_FS_VMON2_UV_UNDERVOLTAGE_REPORTED
#define FS8X_FS_FS_DIG_REF_OV_OVERVOLTAGE_REPORTED
#define FS8X_FS_FS_WD_G_MASK
#define FS8X_FS_DIAG_SAFETY_ADDR
#define FS8X_FS_I_VMON1_UV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_FCCU12_ERROR_DETECTED
#define FS8X_FS_VMON1_OV_OVERVOLTAGE_REPORTED
#define FS8X_FS_RSTB_DRV_MASK
#define FS8X_M_VPREUVH_EVENT_OCCURRED
#define FS8X_FS_VMON1_UV_UNDERVOLTAGE_REPORTED
#define FS8X_M_VSUPUV7_EVENT_OCCURRED
#define FS8X_M_INT_MASK1_ADDR
#define FS8X_FS_I_VMON1_OV_FS_IMPACT_NO_EFFECT
#define FS8X_FS_VMON3_OV_OVERVOLTAGE_REPORTED
#define FS8X_FS_WDW_RECOVERY_128MS
#define FS8X_FS_RSTB_SNS_MASK
#define FS8X_FS_I_SVS_ADDR
#define FS8X_FS_VDDIO_OV_OVERVOLTAGE_REPORTED
#define FS8X_M_LVB1_SVS_ADDR
#define FS8X_FS_I_FCCU1_FS_REACT_FS0B
#define FS8X_FS_SPI_FS_REQ_SPI_VIOLATION
#define FS8X_M_FLAG2_ADDR
#define FS8X_FS_I_WD_RFR_CNT_SHIFT
#define FS8X_FS_FS_WD_G_GOOD_WD_REFRESH
#define FS8X_FS_I_FLT_ERR_CNT_LIMIT_8
#define FS8X_FS_GO_TO_INITFS_GO_BACK_TO_INIT_FS
#define FS8X_FS_I_OVUV_SAFE_REACTION2_ADDR
#define FS8X_FS_I_VMON4_UV_FS_IMPACT_NO_EFFECT
#define FS8X_M_VPREUVL_EVENT_OCCURRED
#define FS8X_FS_OTP_CORRUPT_NO_ERROR
#define FS8X_FS_ABIST1_OK_MASK
#define FS8X_FS_LBIST_OK_PASS
#define FS8X_FS_BAD_WD_DATA_MASK
#define FS8X_FS_I_WD_RFR_LIMIT_4
#define FS8X_FS_STATES_ADDR
#define FS8X_M_MEMORY0_ADDR
#define FS8X_FS_I_VCOREMON_ABIST2_VCOREMON_BIST
#define FS8X_FS_GRL_FLAGS_ADDR
#define FS8X_FS_FCCU2_ERROR_DETECTED
STD_RETURN_TYPE_e SPI_TransmitReceiveData(SPI_INTERFACE_CONFIG_s *pSpiInterface, uint16 *pTxBuff, uint16 *pRxBuff, uint32 frameLength)
Transmits and receives data on SPI without DMA.
Headers for the driver for the SPI module.
SPI_INTERFACE_CONFIG_s spi_sbcMcuInterface
STD_RETURN_TYPE_e finState
volatile uint32_t * pGIOport
STD_RETURN_TYPE_e finState
uint16_t iWatchdogConfiguration
uint16_t overvoltageUndervoltageRegisterStatus
uint16_t iOvervoltageUndervoltageSafeReaction2
uint16_t iFailSafeSateMachine
uint16_t iOvervoltageUndervoltageSafeReaction1
uint16_t registerControl1
uint16_t registerControl2
uint16_t analogMultiplexer
FS85_MAIN_REGISTERS_s mainRegister
FS85_OPERATION_MODE_e mode
FS85_FS_REGISTER_s fsRegister
FS85_FIN_CONFIGURATION_s fin
fs8x_drv_data_t configValues
SPI_INTERFACE_CONFIG_s * pSpiInterface
Structure representing received data frame.
uint16_t readData
Content of a read register.
uint8_t deviceStatus
A device status is returned into this byte after a successful transfer.